Hardware Security – Chip analysis and validation in a controlled environment

The secure characterisation core facility supports academic and industrial partners in the evaluation of the robustness of components (notably chips and associated media) against current threats. The objective is to enable the validation of products and countermeasures using state-of-the-art hardware attack techniques, within a framework designed to protect the confidentiality of the work.

A Response to Security Challenges

In a context where security is a permanent race between attackers and defenders, and where threats are becoming more complex, the core facility helps to anticipate vulnerabilities as early as possible and in various forms, serving the security and robustness of systems.

A Comprehensive Offering for Secure Chip Characterisation

The core facility offers a workflow covering:

  • sample preparation,
  • acquisition via various expert methods,
  • data processing and result extraction.

Areas of Expertise

The core facility relies on 4 main areas:

  • Electrical Testing,
  • SPA / DPA (power analysis),
  • SEMA / DMA (electromagnetic analysis),
  • Laser Fault Injection.

Synergy and Associated Services with the Micro-PackS Platform

To meet complex chip preparation and encapsulation needs, the core facility relies on the services and infrastructure of the Micro-PackS platform. Located within the Centre of Microelectronics in Provence (CMP), this technological platform offers a global value chain:

  • Advanced sample preparation and decapsulation: chip opening, silicon substrate thinning, and back-side preparation to allow laser shots or electromagnetic characterisation.
  • Custom prototyping and assembly (Micro-packaging): specific packaging, board mounting, or micro-assembly adapted to the constraints of secure test benches.
  • Physical expertise and structural characterisation: non-destructive testing and physico-chemical characterisation upstream or downstream of hardware security tests.

Key Benefits

  • Access to evaluation techniques comparable to those used by attackers.
  • Integrated expertise chain ranging from component preparation/assembly (via Micro-PackS) to secure attack benches.
  • Secure environment: isolated platform, individual access to rooms.
  • Enhanced confidentiality: possibility of working with a personal removable hard drive.
  • Possible interfacing with different types of media.
  • Flexible approach: use an automated solution or develop your own method.
  • Shared multidisciplinary team (EMSE/LETI, Gemalto, STMicroelectronics).

Contact

Anne-Lise RIBOTTA

Research Engineer